White Papers

NTIA Spectrum Fact Sheet
The NTIA prepared the report pursuant to the June 28, 2010 Presidential Memorandum that directed the Secretary of Commerce, through NTIA, to collaborate with the FCC to produce a ten-year plan and timetable for making available 500 megahertz of Federal and non-Federal spectrum suitable for wireless broadband use, while taking into account the need to ensure there is no loss of existing critical government capabilities and the need for appropriate enforcement mechanisms and authorities.

Low Power Design and Verification Techniques
There are many techniques that have been developed over the past decade to address the continuously aggressive power reduction requirements of most ASIC and SoC designs. They include clock gating, multi-switching (multi-Vt) threshold transistors, multi-supply multi voltage (MSMV), power gating with or without state retention, dynamic voltage and frequency scaling (DVFS), and substrate biasing. The use of any of these techniques comes at a cost and their benefit varies depending on the technique used.

Low-Power Physical Design with Olympus-SoC
Reducing power consumption has become a key design challenge at 45/32 nm technology nodes. For many designs, optimizing for power is as important as timing, due to the need to reduce package cost and extend battery life. However, the complexities of designing low-power chips can negatively impact performance and time to market. Designers are being forced to juggle macro-level functional complexity issues (multiple operational modes), and micro-level process and manufacturing issues (multiple design corners) that could have conflicting power, timing, signal integrity (SI), manufacturability, and area closure requirements.

Top Design Considerations for Low-Power Metering Applications
As green energy management becomes a global imperative, the idea of implementing intelligent systems and wireless technology to more efficiently use energy and other natural resources has become a pervasive reality. It began with a relatively simple idea. If you add embedded intelligence and a communications link to a traditional metering device, you have the ability to remotely access the data that the “smart meter” has collected.

How to Design Capacitive Touch & Proximity Sensing Technology into Your Application
What defines good human interface design, and how can system designers implement a smarter, friendlier and more intuitive solution? To begin answering these questions, it is helpful to view a human interface simply as a set of functional interactions with end users and their surroundings. These interactions can be subdivided into two logical groupings: inputs and outputs.

Simplifying Power Supply Design in FPGA-based Systems
FPGA-based systems have become common and are appropriate for many applications. However, by their nature, FPGAs are power-hungry devices with complex power delivery requirements and multiple voltage rails. When FPGA power consumption increases, performance requirements on sensitive analog and mixed signal subsystems also increase, particularly on clocking subsystems that provide low jitter timing references for the FPGA and other board-level components. By using clock sources with integrated power supply noise rejection, designers can simplify power supply design and mitigate these design challenges.

When to Use a Clock vs. an Oscillator
A wide range of timing solutions are available, including crystal oscillators (XO), voltage-controlled crystal oscillators (VCXO), and clocks. No one size fits all strategy applies when it comes to component selection. Picking the right device for a particular application is dependent on a number of factors, including whether or not the clocks must be synchronized to an externally provided reference clock, the system architecture of the processor and high speed serial data transmission ICs, and the frequency and jitter requirements of the end application.

Enhancing Power Delivery System Designs with CMOS-Based Isolated Gate Drivers
As emerging green standards challenge designers to deliver more energy-efficient, cost-effective and reliable power delivery systems in smaller form factors, the need for greater power and isolation device integration becomes increasingly important. A critical building block within ac-dc and isolated dc-dc power supplies is the isolated gate driver.

Low Power Design Basics
As the use of electronic devices pervades virtually every aspect of our lives, reducing power consumption must start at the semiconductor level. The power-saving techniques that are designed in at the chip level have a far-reaching impact. This is especially true with regard to the microcontrollers (MCUs) that serve as the intelligent engines behind a majority of today’s electronic devices.

Developing Reliable Isolation Circuits
Over the last four decades, optocouplers have been the “default” signal isolation device, but recent breakthroughs in silicon isolation technology have spawned smaller, faster, and more reliable and cost-effective solutions that have already begun supplanting optocouplers in many end applications. This white paper discusses industrial isolation issues and ways RF isolation technology can be applied to increase system robustness and performance.